Part 1: Tools, Instruction Set, and Datapath: Circuit Cellar, March 2000. — p. 26-32. Part 2: Pipeline and Control Unit Design: Circuit Cellar, April 2000. — p. 1-7. Part 3: System-on-a-Chip Design: .Circuit Cellar, May 2000. — p. 1-7. Several companies sell FPGA CPU cores, but most are synthesized implementations of existing instruction sets, filling huge, expensive FPGAs, and...
UMS/HEP 95-002 submitted to NIM 9 October 1995. — 10 p. Offline software using TCP/IP sockets to distribute particle physics events to multiple Unix/RISC workstations is described. A modular, building block approach was taken, which allowed tailoring to solve specific tasks efficiently and simply as they arose. The modest, initial cost was having to learn about sockets for...
Springer Berlin Heidelberg, 1999. — 539 p. Analytical Modeling of Parallel Applications in Heterogeneous Computing Environments: A Study of Cholesky Factorization Skeletons and Transformations in an Integrated Parallel Programming Environment* Sequential Unification and Aggressive Lookahead Mechanisms for Data Memory Accesses A Coordination Model and Facilities for Efficient...
Источник публикации не известен, 2009. — 7 p. CMOS Monolithic Active Pixel Sensors (MAPS) are proposed as a technology for various vertex detectors in nuclear and particle physics. We discuss the mechanisms of ionizing radiation damage on MAPS hosting the the dead time free, so-called self bias pixel. Moreover, we discuss radiation hardened sensor designs which allow operating...
Scientific Reports, 4 : 5548, DOI: 10.1038/srep05548. — 6 p. Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low...
Springer Science+Business Media, LLC, 2011. — 185 p. The minimum feature size of CMOS technology will approach 10 nm in 10 years. Such aggressive scaling will lead to wonderful benefits to consumers, businesses and the global society. Unfortunately, it will also lead to increased power dissipation, process variations and device drift, posing tremendous new challenges to designing...
Compaq Computer Corporation, 1998. — 371 p. Chapters 1 through 8 and appendixes A through E of this book are directly derived from the Alpha System Reference Manual, Version 7 and passed engineering change orders (ECOs) that have been applied. It is an accurate representation of the described parts of the Alpha architecture. References in this handbook to the Alpha Architecture...
3rd edition. — Издательство не указано, 2013. — 64 p. — (Computer Architecture Series 3). This book discusses the Reduced Instruction Set Computer architecture, a technique to streamline instruction execution. Sometimes, RISC is said to stand for “Relegate Important Stuff to the Compiler,” since the compilation process is done offline, and then the code is run. The time penalty...
2nd edition. — Издательство не указано, 2013. — 63 p. — (Computer Architecture Series 3). This book discusses the Reduced Instruction Set Computer architecture, a technique to streamline instruction execution. Sometimes, RISC is said to stand for “Relegate Important Stuff to the Compiler,” since the compilation process is done offline, and then the code is run. The time penalty...
Intel Corp., 1990. — 319 p. The Intel i860 64-bit microprocessor is a general purpose microprocessor integrating an integer RISC core unit, a floating-point unit, a paged memory management unit, instruction and data caches, and 3-D graphics software assist logic in a single VLSI component. The versatile 64-bit design of the i860 microprocessor balances performance across integer,...
Compaq Computer Corporation, 2002. — 356 p. This manual is for system designers and programmers who use the Alpha 21264/EV68A microprocessor (referred to as the 21264/EV68A).
Digital Equipment Corporation, 1996. — 314 p. This manual describes the architecture, internal design, and external interface of the Alpha 21066 and Alpha 21066A microprocessors. The Alpha 21066/21066A Microprocessors Data Sheet describes electrical, mechanical, and thermal characteristics.
Digital Equipment Corporation, 1992. — 544 p. — ISBN: I-55558-098-X. In the foreword to the VAX Architecture Reference Manual, Sam Fuller, Digital's Vice President for Research and Architecture, wrote, "Computer design continues to be a dynamic field; I expect we will see more rather than less change and innovation in the decades ahead." The Alpha Architecture Reference Manual...
2nd edition. — Digital Equipment Corporation, 1995. — 860 p. — ISBN: 1-55558-145-5. In the foreword to the first edition of the VAX Architecture Reference Manual, Sam Fuller stated "Computer design continues to be a dynamic field; I expect we will see more rather than less change and innovation in the decades ahead." The Alpha AXP Architecture Reference Manual demonstrates the...
Motorola, 1997. — 468 p. Overview MPC750 Processor Programming Model L1 Instruction and Data Cache Operation Exceptions Memory Management Instruction Timing Signal Descriptions System Interface Operation L2 Cache Interface Operation Power and Thermal Management Performance Monitor PowerPC Instruction Set Listings Instructions Not Implemented Glossary of Terms and Abbreviations
IBM, Motorola, 1994. — 460 p. The primary objective of this manual is to help hardware and software designers who are working with the PowerPC 604 microprocessor. This book is intended as a companion to the PowerPC Microprocessor Family: The Programming Environments, referred to as The Programming Environments Manual. Because the. PowerPC Architecture is designed to be flexible to...
IBM, Motorola, 1998. — 468 p. PowerPC 740/PowerPC 750 Overview Processor Programming Model L1 Instruction and Data Cache Operation Exceptions Memory Management Instruction Timing Signal Descriptions Bus Interface Operation L2 Cache Interface Operation Power and Thermal Management Performance Monitor PowerPC Instruction Set Listings Instructions Not Implemented Glossary of Terms...
Naval Postgraduate School, 1986. — 112 p. The first Reduced Instruction Set Computer (RISC) appeared at the end of the 1970' s and since then long and heated discussions have taken place in the computer architecture community. These discussions centered around the validity of the claims made by the RISC proponents regarding the performance achieved by the proposed machines when...
Force Computers Inc./GmhH, n.d. — 464 p. This SPARe CPU-5V Technical Reference Manual provides a comprehensive guide to the SPARe CPU-5V board you purchased from FORCE COMPUTERS. In addition, each board delivered by FORCE includes an Installation Guide. Please take a moment to examine the Table of Contents of the SPARC CPU-5V Technical Reference Manual to see how this...
Solbourne Computer, Inc., 1988. — 190 p. This manual describes version 7 of the SPARC architecture, Sun Microsystems' 32-bit RISC architecture. This architecture makes possible implementations that can execute instructions for high-level language programs at rates approaching 1 instruction per processor clock. It supports a floating-point coprocessor with multiple arithmetic units...
Second edition. — Cypress Semiconductor Company, 1990. — 459 p. SPARC, an acronym for Scalable Processor ARChitecture, is an open RISC architecture with multiple semiconductor implementations from a number of vendors. SPARC is an architecturally driven standard, with binary compatibility of software between processor versions ensured by enforcing compliance to the architecture...
2nd edition. — John Wiley & Sons, 1996. — 662 p. — ISBN: 0471128457. There are two kinds of cryptography in this world: cryptography that will stop your kid sister from reading your files, and cryptography that will stop major governments from reading your files. This book is about the latter. If I take a letter, lock it in a safe, hide the safe somewhere in New York, then tell...
Springer, 1999. — 337 p. — (Lecture Notes in Computer Science 1560). — ISBN: 978-3-540-65644-9. A New Type of “Magic Ink” Signatures — Towards Transcript-Irrelevant Anonymity Revocation A New Aspect of Dual Basis for Efficient Field Arithmetic On the Security of Random Sources Anonymous Fingerprinting Based on Committed Oblivious Transfer How to Enhance the Security of...
World Scientific, 2007. — 446 p. — ISBN13: 978-981-256-810-6; ISBN10: 981-256-810-7. This is the first book dedicated to the next generation of MOSFET models. Addressed to circuit designers with an in-depth treatment that appeals to device specialists, the book presents a fresh view of compact modeling, having completely abandoned the regional modeling approach.Both an overview...
O’Reilly Media, 2007. — 370 p. — ISBN10: 0-596-00958-5; ISBN13: 978-0-596-00958-8. This book is about system programming—specifically, system programming on Linux. System programming is the practice of writing system software, which is code that lives at a low level, talking directly to the kernel and core system libraries. Put another way, the topic of the book is Linux system...
Hitachi, 1994. — 300 p. The SH7000 and SH7600 series are new-generation RISC (Reduced instruction set computer) microcomputers that integrate a RISC-type CPU and the peripheral functions required for system configuration onto a single chip to achieve high-performance operation. It can operate in a powerdown state, which is an essential feature for portable equipment. These CPUs...
Intel Corp., 1995. — 1810 p. The Pentium Pro processor is the next in the Inte1386, Inte1486, and Pentium family of processors. The Pentium Pro processor implements a Dynamic Execution micro-architecture - a unique combination of multiple branch prediction, data flow analysis, and speculative execution. The Pentium Pro processor is upgradable by a future OverDrive'" processor...
Intel Corporation, 1996. — 490 p. The Pentium Pro Family Developer's Manual, Volume 3: Operating System Writer's Guide (Order Number 242692) is part of a three-volume set that describes the architecture, programming environment, and hardware features of the Pentium Pro processor.
Intel Corporation, 1996. — 658 p. The Pentium Pro Family Developer's Manual, Volume 2: Programmer's Reference Manual (Order Number 242691) is part of a three-volume set that describes the architecture, programming environment, and hardware features of the Pentium Pro processor.
Intel Corporation, 1996. — 362 p. The Pentium Pro microprocessor is the next generation in the Inte1386, Inte1486, and Pentium family of processors. The Pentium Pro processor implements a Dynamic Execution microarchitecture - a unique combination of multiple branch prediction, data flow analysis, and speculative execution while maintaining binary compatibility with the 8086/88,...
Intel Corporation, 1995. — 110 p. Added Errata 22-25 and Spec Clarification 15 to Part I. Added Spec Change 12, Errata 24-27, 8DP-12DP and 11AP, Spec Clarification 3, and Doc Change 6 to Part Ii.
Hitachi, 1995. — 631 p. The SH7032 and SH7034 are part of a new generation of reduced instruction-set computer-type (RISC) microcomputers that integrate RISC-type CPUs and the peripheral functions required for system configuration onto a single chip to achieve high-performance operations processing. They can operate in a power-down state, which is an essential feature for portable...
Intel Corporation, 1995. — 874 p. Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale for such products. Intel Corporation makes no warranty for the use of its products...
Intel Corporation, 1993. — 1056 p. Getting started Introduction to the Intel Pentium processor family Application and numeric programming Basic programming model Application programming Feature determination Numeric applications Special computational situations Numeric programming examples System programming Real-address mode system architecture Protected mode system architecture...
Выходные данные неизвестны. 1732. — 388 с. В документе 1732 года, адресованном на имя Императрицы, производится попытка классификации используемого на тот момент вооружения (с чертежами), а также структуры российской армии. Отдельные части посвящены минерам, береговой артиллерии и артиллерийским школам, а также финансовой стороне обеспечения.
Л.: АН СССР, 1929. — 162 с. — (Энциклопедия славянской филологии. Выпуск 4.3). Вниманию читателей предлагается книга отечественного филолога М.Н. Сперанского, посвященная исследованию систем тайнописи в юго-славянских и русских памятниках письма. Показано, что славянские системы тайнописи как более поздние по происхождению в большинстве случаев находятся в прямой или косвенной...
Springer, 1998. — 282 p. — ISBN: 978-3-642-71978-3. Length Scales Characterizing Mesoscopic Systems Landauer’s Formula Fluctuations and Aharonov-Bohm Effect Ballistic Electron Transport Coulomb Blockade Tomonaga—Luttinger Liquid in Quantum Wires Quantum Wires Magnetophonon Resonance in Quantum Wires Quantum Dots and Artificial Atoms Antidot Lattices — Classical and Quantum...
Springer, 2004. — XXI, 334 p. — ISBN: 978-3-642-07333-5. Laser Diode Microsystems provides the reader with the basic knowledge and understanding required for using semiconductor laser diodes in optical microsystems and micro-optical electromechanic systems. This tutorial addresses the fundamentals of semiconductor laser operation and design, coupled with an overview of the...
Naval Air Warfare Center - Weapons Division B.S., Rensselaer Polytechnic Institute, 1994. — 130 p. Convolutional encoding is a method of adding redundancy to a data stream in a controlled manner to give the destination the ability to correct bit errors without asking the source to retransmit. Convolutional codes, and other codes which can correct bit errors at the receiver, are...
В бумажном виде не издавалась, 2012. — 282 с. Официальная русская версия книги Pro Git. Введение Об управлении версиями Краткая история Git Основы Git Установка Git Первоначальная настройка Git Как получить помощь? Итоги Основы Git Создание репозитория Git Запись изменений в репозиторий Просмотр истории коммитов Отмена изменений Работа с удалёнными репозиторями Работа с метками...
2nd ed. — Apress, 2014. — 574 p. Pro Git (Second Edition) is your fully-updated guide to Git and its usage in the modern world. Git has come a long way since it was first developed by Linus Torvalds for Linux kernel development. It has taken the open source world by storm since its inception in 2005, and this book teaches you how to use it like a pro. Effective and...
Springer US, 2004. — 226 p. — ISBN: 978-1-4419-5254-7. Existing Code Optimization Techniques Fundamental Concepts for Optimization and Evaluation Intermediate Representations and Their Suitability for Source Code Optimization Loop Nest Splitting Advanced Code Hoisting Ring Buffer Replacement Summary and Conclusions
Basel: Birkhauser Basel, 2004. — 405 p. — ISBN: 978-3-0348-9602-3. On the Secondary Constructions of Resilient and Bent Functions Adaptive Recursive MLD Algorithm Based on Parallel Concatenation Decomposition for Binary Linear Codes Modularity of Asymptotically Optimal Towers of Function Fields A New Correlation Attack on LFSR Sequences with High Error Tolerance LDPC Codes: An...