Altera Corporation. Introduction to the Altera Nios II Soft Processor

New York: Altera Corporation, 2011. — 27 p.This tutorial presents an introduction to Altera’s Nios II processor, which is a soft processor that can be instantiated on an Altera FPGA device. It describes the basic architecture of Nios II and its instruction set. The Nios II processor and its associated memory and peripheral components are easily instantiated by using Altera’s SOPC Builder or Qsys tool in conjuction with the Quartus II software.
A full desciption of the Nios II processor is provided in the Nios II Processor Reference Handbook, which is available in the literature section of the Altera web site. Introductions to the SOPC Builder and Qsys tools are given in the tutorials Introduction to the Altera SOPC Builder and Introduction to the Altera Qsys Tool, respectively. Both can be found in the University Program section of the web site.Nios II System
Overview of Nios II Processor Features
Register Structure
Accessing Memory and I/O Devices
Instructions
Load and Store Instructions
Arithmetic Instructions
Logic Instructions
Move Instructions
Comparison Instructions
Rotate Instructions
Branch and Jump Instructions
Control Instructions
Carry and Overflow Detection
Assembler Directives
Example Program
Exception Processing
Hardware Interrupts
Exception Processing Example
Cache Memory
Tightly Coupled Memory