Shu K., Sánchez-Sinencio E. CMOS PLL Synthesizers: Analysis and Design

Boston: Springer, 2005. — 232 p. — ISBN: 0-387-23668-6.CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which elegantly tackle speed and integration bottlenecks of PLL synthesizer.
This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers.Frequency Synthesizer for Wireless Applications
PLL Frequency Synthesizer
ΣΔ Fractional-N PLL Synthesizer
Enhanced Phase Switching Prescaler
Loop Filter with Capacitance Multiplier
Other Building Blocks of PLL
Prototype Measurement Results
Conclusions