Wachutka G., Schrag G. Simulation of Semiconductor Processes and Devices

Springer Vienna, 2004. — 387 p. — ISBN: 978-3-7091-7212-4.This volume contains the proceedings of the 10th edition of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2004), held in Munich, Germany, on September 2-4, 2004. The conference program included 7 invited plenary lectures and 82 contributed papers for oral or poster presentation, which were carefully selected out of a total of 151 abstracts submitted from 14 countries around the world. Like the previous meetings, SISPAD 2004 provided a world-wide forum for the presentation and discussion of recent advances and developments in the theoretical description, physical modeling and numerical simulation and analysis of semiconductor fabrication processes, device operation and system performance. The variety of topics covered by the conference contributions reflects the physical effects and technological problems encountered in consequence of the progressively shrinking device dimensions and the ever-growing complexity in device technology.Advanced Transport Models for Sub-Micrometer Devices.
NEMO 1-D: the first NEGF-based TCAD tool.
The Density-Gradient Correction as a Disguised Pilot Wave of de Broglie.
Full Band and Approximated Solutions of the Schrödinger Equation in Silicon Inversion layers.
A Hybrid 3D Quantum Mechanical Simulation of FinFETs and Nanowire Devices.
On the Calculation of Quasi-Bound States and Their Impact on Direct Tunneling in CMOS Devices.
Quantum Mechanical Simulation in DG MOSFETs Based on a Tight Binding Green’s Function Formalism.
Modeling B Uphill Diffusion in the Presence of Ge.
Ab-initio Calculations to Predict Stress Effects on Boron Solubility in Silicon.
Boron Diffusion in Strained and Strain-Relaxed SiGe.
Modeling dopant diffusion in SiGe and SiGeC layers.
Continuum Modeling of Indium to Predict SSR Profiles.
Theoretical Analysis of Stress and Surface Orientation Effects on Inversion Carrier Mobility.
CMOS Circuit Performance Enhancement by Surface Orientation Optimization.
Modeling of Stress Induced Layout Effect on Electrical Characteristics of Advanced MOSFETs.
Hole Mobility Enhancement Modeling and Scaling Study for High Performance Strained Ge Buried Channel PMOSFETs.
Three-Dimensional Characterization and Modeling of Stress Distribution in High-Density DRAM Memory Cells.
Strain Optimization to Reduce Gate Leakage Current in MOS Transistors with Silicon Oxynitride Gate Dielectrics by Use of First-Principles Calculations.
Simulation Study of Simple CMOS-Compatible Thin-SOI Vertical Bipolar Transistors on Thin BOX with an Inversion Collector.
Current collapse associated with surface states in GaN-based HEMT’s. Theoretical/experimental investigations.