New York: Springer, 2009. — XX, 276 p. — ISBN: 978-0-387-76528-0.
The Designer’s Guide to Jitter in Ring Oscillators provides information for engineers on designing voltage controlled oscillators (VCOs) and phase-locked loops (PLLs) for low jitter applications such as serial data communication and clock synthesis. The material is presented in a clear, intuitive fashion at both the system level and the circuit level to help designers improve their understanding of fundamental noise sources and design low jitter circuitry within power, area, and process constraints so that ultimate performance meets system level requirements.
At the system level, the authors describe and specify different methods of measuring jitter to characterize time domain uncertainty. Although the emphasis is on time-domain measures of oscillator performance, a simple method of translating performance to frequency domain (phase noise) measures is also included.
At the circuit level, the authors include techniques for design of low jitter delay elements for use in ring oscillators, as well as relating the circuit-level characteristics to system-level performance. The authors discuss a classification scheme for delay stages to help guide the designer’s choice with regard to signal type (single-ended vs. differential), output format (single phase vs. multiple phase), and tuning method. Simple mathematical expressions are developed describing the noise-power tradeoffs for each type of stage, so the designer can quickly estimate the power dissipation required to achieve a desired level of jitter.
The Designer’s Guide to Jitter in Ring Oscillators is an excellent resource for engineers and researchers interested in jitter and ring oscillators and their application in communication systems.
Introduction to oscillator jitter.
Applications.
Types of VCOs.
Motivation and goals of this book.
Chapter summary.
Classification of ring oscillators.
Type of signal in the ring.
Timing method.
Output format.
Chapter summary.
Phase-Locked Loop System Concepts.
Phase and frequency concepts.
Phase and jitter concepts in PLL applications.
Measuring phase.
Measures that will be related in this book.
Chapter Summary.
Approximate loop transfer functions.
Power spectra relationships.
Overview of Noise Analysis Fundamentals.
Fundamentals of random signals - time domain.
Fundamentals of random signals - frequency domain.
Circuit analysis with random voltages and currents.
Noise.
Noise in oscillators.
Chapter summary.
Non-ergodic processes.
Exponentials with gaussian distributed exponents.
Fourier transform pairs.
Measurement Techniques.
Theoretical development.
Instrumentation.
Experimental verification.
Chapter summary.
Analysis of jitter process.
Data acquisition techniques.
Analysis of jitter in ring oscillators.
Review of jitter analysis in different types of oscillators.
Jitter model theoretical development.
Methodology: applying model to circuit design.
Experimental verification.
Chapter summary.
Stationarity of two-sample variance.
Variance of clock period errors.
Sources of jitter in ring oscillators.
Control Path: system-level sources of noise.
Load element noise.
Switching element noise.
Bias element noise.
Summary of noise contributions.
Experimental Verification.
Comparison with jitter in harmonic oscillator.
Chapter summary.
Differential pair switching delay.
Time-domain (transient) noise source simulation.
Design methodology.
Implications for design and simulation.
Methodology Overview.
General design techniques for low jitter.
Chapter summary.
Low jitter VC О design examples.
CMOS single-ended ring oscillator.
Bipolar differential ring oscillator.
Ring oscillator design.
Chapter summary.