New York: Kluwer Academic Publishers. – 2003. – 210 p. Layout generation is an important topic in IC design. For digital circuits a lot of research has been conducted in this area, resulting in a large variety of books and layout generation tools. However, with the ever increasing frequencies, we are facing now significant analog types of artifacts in the IC, introduced during the physical design phase, when schematics are translated to physical ICs via a layout. In this book we focus on two strongly coupled aspects of automatic layout generation, placement and routing. We will discuss the problem in detail in the context of mixed-signal designs. Apart from the physical artifacts and their parasitic influence on the electrical behavior of the circuit, we will address aspects related to the optimization problem associated with automatic layout generation. These are the optimization methods, with special emphasis on simulated annealing; adequate data structures; appropriate models and representations; and efficient algorithms. As optimization is an iterative process, incremental algorithms that only generate strictly necessary new information are especially interesting to speed up the process. These algorithms get special attention. The book can be seen as a combination of introductory texts and results of new research. Therefore it will be interesting for designers that like to get an overall picture, and for experts in the field who like to see the state of the art, and who will be interested in the new topics discussed in this book. Moreover, it is interesting both for designers and specialists in the area of circuit design and for those working in the area of electronic design automation (EDA).
List of Abbreviations
Mapping Problems in the Design Flow
OptimizationMethods
Optimization Approach Based on Simulated Annealing
Efficient Algorithms and Data Structures
Placement
Routing
Dealing with Physical Phenomena: Parasitics, Crosstalk and Process Variations
Conclusions
About the Authors