Morgan Kaufmann, 2006. — 528 p. — ISBN: 978-0123695260.
На англ. языке.
Customizable processors have been described as the next natural step in the evolution of the microprocessor business: a step in the life of a new technology where top performance alone is no longer sufficient to guarantee market success. Other factors become fundamental, such as time to market, convenience, energy efficiency, and ease of customization.
This book is the first to explore comprehensively one of the most fundamental trends which emerged in the last decade: to treat processors not as rigid, fixed entities, which designers include as is in their products; but rather, to build sound methodologies to tailor-fit processors to the specific needs of such products.
This book addresses the goal of maintaining a very large family of processors, with a wide range of features, at a cost comparable to that of maintaining a single processor.
First book to present comprehensively the major ASIP design methodologies and tools without any particular bias.
Written by most of the pioneers and top international experts of this young domain.
Unique mix of management perspective, technical detail, research outlook, and practical implementation.
Part I: Opportunities and Challenges
From Prêt-à-Porter to Tailor-Made
Opportunities for Application-Specific Processors: The Case of Wireless Communications
Customizing Processors: Lofty Ambitions,
Part II: Aspects of Processor Customization
Architecture Description Languages
C Compiler Retargeting
Automated Processor Configuration and Instruction Extension
Automatic Instruction-Set Extensions
Challenges to Automatic Customization
Coprocessor Generation from Executable Code
Datapath Synthesis
Instruction Matching and Modeling
Processor Verification
Sub-RISC Processors
Part III: Case Studies
Application Specific Instruction Set Processor for UMTS-FDD Cell Search
Hardware/Software Tradeoffs for Advanced 3G Channel Decoding
Application Code Profiling and ISA Synthesis on MIPS32
Designing Soft Processors for FPGAs